I am a Senior Research Scientist at Oratomic. Starting Fall 2027, I will also join UC Berkeley as an Assistant Professor of Electrical Engineering & Computer Sciences and the Igarashi Faculty Fellow, where I will start my research group. Previously, I was a Sherman Fairchild postdoctoral fellow in the Walter Burke Institute for Theoretical Physics at Caltech. I received my Ph.D. in Quantum Science and Engineering from the University of Chicago in 2024 and my B.S. in Physics from Nanjing University in 2019.

I am looking for students and postdocs to join my group at UC Berkeley EECS, starting Fall 2027. Applicants from computer science, mathematics, physics, and engineering are welcome. If you are excited about architecting and applying the first generation of utility-scale quantum computers, please reach out to me at qianxu@berkeley.edu. Prospective PhD students should apply to the Berkeley EECS PhD program and mention my name in their applications.

Research Overview

My research aims to architect utility-scale fault-tolerant quantum processors, and explore their applications. Quantum computers promise to solve problems no classical machine ever will, but today’s devices are too noisy and too small to deliver on that promise. I work to close this gap on both ends: rethinking how quantum machines are designed so that far fewer qubits achieve far more reliable computation, and charting what the first generation of reliable quantum machines will actually do: simulating novel physical and chemical systems, precision measurement, cryptography, and beyond. This program lives at the interface between abstract theory and real physical systems, and draws on physics, computer science, mathematics, and engineering alike.

My research interests are organized into the following directions:

1. Theory of quantum error correction and fault tolerance

What are the ultimate limits of protecting and processing quantum information, and how do we construct codes and protocols that reach them? I am interested in the mathematical foundations of quantum error correction and fault tolerance, particularly their connections to classical coding theory, quantum information theory, and complexity theory.

Left: batched logical operations (arXiv:2510.06159). Center: transversal dimension jump (arXiv:2510.07269). Right: canonical lifted product codes, Figure 1 (arXiv:2607.28605). Click for the story behind these figures ▸

Left figure: in conventional low-rate codes, each logical gate uses dedicated space and time (a,c). Batched operations share resources across many logical qubits in high-rate codes (b,d), enabling fast, universal logical operations with nearly constant overhead on arbitrary qLDPC codes.

Center figure: product constructions build quantum LDPC codes from classical codes, while their algebraic structure also supports logical computation. A transversal "dimension jump" converts between a 3D product code and a stack of 2D codes in one step, enabling single-shot logical operations.

Right figure: a canonical logical basis makes the structure of lifted product codes accessible for computation. It enables a complete logical instruction set, including symmetry-based Clifford gates, code surgery, and parallel magic-state injection.

2. Architectures for fault-tolerant quantum computers

What will the first utility-scale quantum machines look like? A central theme is how the different layers of a quantum computer can be designed together, from quantum codes and logical operations to compilation, decoding, and hardware. Platforms of interest include neutral atoms, superconducting circuits, trapped ions, and bosonic systems.

Left: reconfigurable atom arrays (Nat. Phys. 2024). Center: high-rate qLDPC processors, panel (b) (arXiv:2607.28795). Right: squeezed cat qubits (npj Quantum Inf. 2023). Click for the story behind these figures ▸

Left figure: high-rate qLDPC codes encode many logical qubits collectively, reducing the physical resources needed for error correction. Their product structure fits reconfigurable atom arrays with simple global controls, allowing hundreds of logical qubits in roughly a thousand physical qubits. The contour plots compare the overhead with surface codes.

Center figure: an architecture must preserve the space efficiency of high-rate codes while supporting logical computation. Group symmetry provides a complete, parallelizable instruction set built from reusable gadgets for surgery, batched gates, and parallel magic-state injection. Together, these ingredients support a "GPU-style" architecture with many logical qubits operated on in parallel at nearly constant overhead.

Right figure: squeezed cat qubits use engineered dissipation to autonomously correct excitation loss in a bosonic mode. Combining these building blocks with outer codes offers a way to reduce the overhead of fault tolerance. A complementary approach uses discrete-variable ancillae for fault-tolerant operations on bosonic qubits (PRX 2024).

3. Applications of fault-tolerant quantum machines

What will the first fault-tolerant quantum computers actually do, and how soon? Here, my interests lie in connecting quantum algorithms with realistic fault-tolerant architectures, particularly for quantum simulation, cryptanalysis, and precision sensing. Examples include simulating quantum dynamics beyond classical reach, reducing the resources needed for Shor’s algorithm, and approaching fundamental limits of measurement precision.

Left: Shor's algorithm, panel (b) (arXiv:2603.28627). Right: quantum simulation and QEC co-design: XXZ lattice → parallel circuits → qLDPC operations, Figure 6(a,b) (arXiv:2510.06159). Click for the story behind these figures ▸

Left figure: co-designing Shor's algorithm with a qLDPC-based reconfigurable atom-array architecture leads to an estimated requirement of roughly 10,000 atomic qubits for factoring RSA-2048. The star marks this proposal among published estimates, illustrating how matching an algorithm to its architecture can reduce resource requirements.

Right figure: panel (a) shows the XXZ lattice, and panel (b) maps its simulation layers onto qLDPC code blocks. Code symmetries provide logical translations, while transversal Clifford gates and parallel magic-state cultivation implement the rotations. This co-design of quantum simulation and QEC aligns the algorithm's parallel structure with native logical operations to reduce space-time overhead.

4. AI for quantum

Looking ahead, I am also interested in how AI can help us design the next generation of quantum machines and explore their applications. Examples include discovering new quantum error-correcting codes, decoding and compilation strategies, and full-stack optimization of algorithms, QEC, and hardware.